标 题: AMD R&D Center招募实习生(Shanghai)
发信站: 南京大学小百合站 (Mon May 12 12:11:33 2008)

Notes
• Can work in office around 6 months, 3+ workdays per week.(Must, pls ma
ke sure about it before sending resume)
• Will get a full-time offer based on your performance after Internship

• Do not repeat to apply
• Internship period: late May----early Nov.
• Written test and interview: early May
• send resume to Brittany.Zhang@AMD.com , marked with position and your
name in email subject line.


ASIC Low Power Design Engineer

Role and Chance
Work with the world top class graphic design team to develop/evaluate low powe
r design methodology; estimate power dissipation from design and analyze power
consumption in real silicon

Skill and Experience Requirement
1. Master in ME, can work in office for above 6 months, 3.5+ days per week
2. Solid Micro-electronics knowledge
3. Solid Verilog HDL coding and Front-End EDA tools
4. Solid ASIC design skill and concept
5. Very familiar with Linux environment
6. Good at C/C++ and script/shell programming (Perl, Python, awk, sed etc.)
7. Good English writing/speaking


Design Verification-HW/SW

Role and Chance
1. Work with the world top class graphic team to verify the next generation co
mputer graphic chips which will support future Microsoft DirectX 10 and beyond
.
2. Your job is to work closely with the ASIC designers to understand the archi
tecture of 3D graphics chip and functional block being designed; develop the r
eference model and testbench to ensure functional completeness.
3. Learn and help developing the advanced verification methodologies and flows
for multi-million-gates ASIC design which is the most sophisticated design th
at you can ever touched. We offer you the opportunity and all the EDA resource
s. Challenge and prove yourself.

Skill and Experience Requirements
1. Master in ME or EE, can work in office for above 6 months, 3.5+ days per we
ek
2. Solid Electronics background knowledge
3. Good Digital Design skill and concept.
4. Familiar with Verilog HDL coding and debugging tools.
5. Familiar with Linux Environment
6. Expert in c/c++, Makefile and at least one of the script/shell programming(
Perl, Python, awk, sed etc.).
7. Strong desire to learn new design methodologies.
8. Experience with design verification methodologies. (plus)
9. Strong Interest on graphics and have some knowledges (Plus)
10. Familiar with Verdi, PLI, SystemC, or Verilog (plus)



Video Performance Verification

Role and Chance
1. Work with world top class graphics/video design team to verification video
performance, analysis performance data and help provide solution for next gene
ration product.
2. Compose test plan and validation vectors to ensure performance design targe
t according to the design specification; perform formal verification on the de
sign; write test vectors for simulation and emulation; and develop test progra
ms.

Skill and Experience Requirement
1. Master in ME or EE, can work in office for above 6 months, 3.5+ days per we
ek
2. Strong computer science background
3. Solid C/C++ coding skills
4. Solid video processing knowledge. Strong plus: MPEG2, MPEG4, H.263, H.264 o
r VC-1 codec developing experience
5. Scripting/programming experience.
6. Familiar with Linux environment
7. Good communication skill, both Chinese and English

SW Model Development Engineer

Role and Chance
C-model and scripts developing in Linux environment

Skill and Experience Requirements
1. Strong C/C++/STL programming skill
2. Strong Perl/C shell/Makefile/Bison or Yacc development skill
3. Familiar with date structure and basic algorithms
4. Familiar with Linux operations
5. Knowledge of Verilog (Optional)


Regression Management Engineer

Role and Chance
Run, monitor and check regressions

Skill and Experience Requirements
1. Familiar with Perl/C shell development
2. Familiar with Linux operations
3. Has knowledge of database management and webpage development (optional)
4. Experience of using EDA tools (optional)


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[1;36 来源:．南京大学小百合站 http://bbs.nju.edu.cn