1.

Work with the world top class graphic team to verify the next generation computer graphic chips which will support future Microsoft DirectX 10 and beyond.

2.

Your job is to work closely with the ASIC designers to understand the architecture of 3D graphics chip and functional block being designed; develop the reference model and testbench to ensure functional completeness.

3.

Learn and help developing the advanced verification methodologies and flows for multi-million-gates ASIC design which is the most sophisticated design that you can ever touched. We offer you the opportunity and all the EDA resources. Challenge and prove yourself.

1.

Master in ME or EE, can work in office for above 6 months, 3.5+ days per week

2.

Solid Electronics background knowledge

3.

Good Digital Design skill and concept.

4.

Familiar with Verilog HDL coding and debugging tools.

5.

Familiar with Linux Environment

6.

Expert in c/c++, Makefile and at least one of the script/shell programming(Perl, Python, awk, sed etc.).

7.

Strong desire to learn new design methodologies.

8.

Experience with design verification methodologies. (plus)

9.

Strong Interest on graphics and have some knowledges (Plus)

10.

Familiar with Verdi, PLI, SystemC, or Verilog (plus)