ASIC engineer intern opportunity@Cisco CRDC
| 职位名称: | ASIC engineer intern opportunity@Cisco CRDC | ||||
|---|---|---|---|---|---|
| 工作地点: | 上海 | 职位类型: | 兼职 | 信息来源: | 复旦BBS |
| 发布时间: | 2008-04-30 | Email: | |||
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具体招聘信息:
标 题: [转载]ASIC engineer intern opportunity@Cisco CRDC
发信站: 日月光华 (2008年04月30日11:16:46 星期三), 站内信件
【 以下文字转载自 FDU_E.E. 讨论区 】
【 原文由 hardware 所发表 】
About Cisco.
Cisco (NASDAQ: CSCO) enables people to make powerful connections-whether in
business, education, philanthropy, or creativity. Cisco hardware, software,
and service offerings are used to create the Internet solutions that make
networks possible-providing easy access to information anywhere, at any
time.Cisco was founded in 1984 by a small group of computer scientists from
Stanford University. Since the companys inception, Cisco engineers have
been leaders in the development of Internet Protocol (IP)-based networking
technologies. Today, with more than 63,050 employees worldwide, this
tradition of innovation continues with industry-leading products and
solutions in the companys core development areas of routing and switching,
as well as in advanced technologies.
We are now looking for excellent students as ASIC intern Engineer:
Job Description:
Participate in the design and verification of complex, high performance and
high integration ASICs used in Cisco networking equipments.
Responsibilities include:
1. Hardware logic design using Verilog HDL language, synthesis to gate and
timing closure to meet the performance requirement.
2. Module and full chip functional verification, formal verification and
test patterns simulation.
3. Assist in prototype bring up in the lab.
Skill and Experience Requirement
1. Master in CS or EE, will graduate in 2009, can work in office for above
6 months, 3.5+ days per week
2. Solid Micro-electronics knowledge
3. Solid Verilog HDL coding and familiar with EDA tools.(VCS, DC, PT,
Spyglass, etc)
4. Solid ASIC design skill and concept
5. Familiar with Linux environment
6. Good at C/C++ and script/shell programming (Perl, TCL etc.)
7. Good English writing/speaking
8. Experience with design verification methodologies.
9. Experience with SystemVerilog is a plus.
Candidate please send his/her resume to: chenywan@cisco.com
Regards
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烟酒僧三年最失败的莫过于——
好工作没找到,MM也么有,却抽到个盲审!
※ 来源:·日月光华 bbs.fudan.edu.cn·FROM:[01EE]
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※ 转载:·日月光华 bbs.fudan.edu.cn·[FROM: 64.104.172.191]
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